JPH0444749U - - Google Patents

Info

Publication number
JPH0444749U
JPH0444749U JP1990087184U JP8718490U JPH0444749U JP H0444749 U JPH0444749 U JP H0444749U JP 1990087184 U JP1990087184 U JP 1990087184U JP 8718490 U JP8718490 U JP 8718490U JP H0444749 U JPH0444749 U JP H0444749U
Authority
JP
Japan
Prior art keywords
input
data
fifo memory
output signal
interface circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990087184U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990087184U priority Critical patent/JPH0444749U/ja
Publication of JPH0444749U publication Critical patent/JPH0444749U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
JP1990087184U 1990-08-21 1990-08-21 Pending JPH0444749U (en])

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990087184U JPH0444749U (en]) 1990-08-21 1990-08-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990087184U JPH0444749U (en]) 1990-08-21 1990-08-21

Publications (1)

Publication Number Publication Date
JPH0444749U true JPH0444749U (en]) 1992-04-16

Family

ID=31819326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990087184U Pending JPH0444749U (en]) 1990-08-21 1990-08-21

Country Status (1)

Country Link
JP (1) JPH0444749U (en])

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